1. Field of the Invention
The present invention relates to an integrated circuit implemented on a circuit board by a soldering connection of a leadless terminals, and the circuit board, and particularly to an integrated circuit and a circuit board that perform self-diagnosis of a fault of a leadless terminal.
2. Description of the Related Arts
Conventionally, in order to achieve demands for downsizing of equipment, such as information apparatuses, and also to achieve high-speed signal transmission, downsizing of components and high-density implementation have been pursued. To achieve such high-density implementation, an ingeniously-devised configuration is used in a package of an integrated circuit. Conventionally, as a leadless package structure suitable for high-density implementation of an integrated circuit, a ball grid array has been known. The ball grid array, commonly called BGA, is a package in which leadless terminals configured by soldering balls are disposed in a lattice shape at regular spacing on the back surface of a package having contact with a printed circuit board, wherein the leadless terminals are soldered to the pattern of the corresponding printed circuit board. The leadless terminals are on the back side of the package in a narrow space between the package and the printed circuit board. Therefore, solder paste for binding is applied in advance to the pattern of the printed circuit board through a printing process, and the entire package is then heated to melt the solder for binding attached to a terminal portion, thereby achieving soldering.    [Patent Document 1] Japanese Patent Laid-Open Publication No. 11-64465    [Patent Document 2] Japanese Patent Laid-Open Publication No. 2000-206199
In a circuit arrangement having implemented thereon an integrated circuit using a ball grid array as a package structure, an unaccounted fault occurs at a high frequency. To track down a cause of such a fault, a method is generally taken such that, with full knowledge of operations at a level of a large-scale apparatus using the circuit arrangement, a malfunction portion is estimated based on various phenomena, measurement data, etc., and then portions that might have caused the fault are narrowed down by a check through direct-current characteristic measurement. However, such tracking down involves many difficulties in skills in trouble diagnosis and the number of processes, and therefore is not easy. To track down such a malfunction portion, it is required to see the state of the leadless terminals on the back side of the package for use in the integrated circuit. However, the terminal portions are hidden on the back side of the package, making it difficult to detect, through a visual inspection, an abnormality, poor connection, short-circuit trouble due to attachment of a foreign matter, and others in the soldering portion. Furthermore, it is often difficult to connect a jig of a measuring device to the leadless terminal or the printed circuit board pattern of a connection destination so as to determine a characteristic abnormality inside the integrated circuit. This poses a problem in specifying a troubled portion in various tests.